查看完整版本: IEEE Verilog HDL 标准（2001年版，791页）

IEEE Verilog HDL 标准（2001年版，791页）

以下为一般性带附件资料发贴选项：
【资料成文时间】：2001年9月
【语言】：英文
【页数】：791
【何人（公司）所著】：IEEE
【文件格式】：pdf
【文件原名】：IEEE Standard Verilog  Hardware Description Language
【摘要或目录】：

The Verilog Hardware Description Language (HDL) is defined in this standard. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. The primary audiences for this standard are the implementors of tools supporting the language and advanced users of the language.

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